Difference between revisions of "RISC"
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| − | + | {{AN}} is an acronym which stands for {{bu|R|educed}} {{bu|I|nstruction}} {{bu|S|et}} {{bu|C|omputer}}. | |
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The basis of a RISC processor is that it has a relatively small set of possible instructions, but it executes those instructions very fast. | The basis of a RISC processor is that it has a relatively small set of possible instructions, but it executes those instructions very fast. | ||
| − | + | The model [[Unknown]] {{verify}} was the first RISC-based server and [[OS/400]] [[V3R6]] was the first operating system version | |
| + | {{Seealso|CISC}} ''processor'' | ||
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| + | ==Categories== | ||
{{stub}} | {{stub}} | ||
| + | [[Category:CPU]] | ||
| + | [[Category:Hardware]] | ||
| + | [[Category:Definitions]] | ||
Revision as of 17:57, 28 February 2007
RISC is an acronym which stands for Reduced Instruction Set Computer.
The basis of a RISC processor is that it has a relatively small set of possible instructions, but it executes those instructions very fast.
The model Unknown [verification needed] was the first RISC-based server and OS/400 V3R6 was the first operating system version
- See also: CISC processor
Categories
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